A Local Area Network (LAN) is a communication network that provides interconnection of a variety of data communicating devices within a small area. Local Networks, p.2, by William Stallings, (MacMillan Publishing Company, 1984). A typical LAN is a computer network limited to a geographically small area such as a plant site or an office building. Various devices, such as computers, terminals, etc., are "plugged into" the network at various locations on the network. Each such device is assigned an address so that digital communications between devices in the network may be properly delivered and received.
A well known and commercially accepted LAN standard is encompassed by the Institute of Electrical and Electronic Engineers (IEEE) standard 802.3. This standard is well known in industry under the name "Ethernet." The IEEE 802.3 standard features a Carrier Sense Multiple Access with Collision Detection (CSMA/CD) media access method whereby two or more stations (devices) share a common bus transmission medium, typically a coaxial cable. To transmit over the LAN, a station or device waits for a quiet period on the bus, that is, no other station is transmitting, and then sends its intended message in bit serial form, at rates up to 10 Mbits/sec.
In the Ethernet/IEEE 802.3 system, messages between devices on the network travel in packets, also known as frames, on the bus. An Ethernet packet is displayed in FIG. 1. In examining the packet from head to tail, we see that it consists of a 64-bit preamble, a 48-bit destination address, a 48-bit source address, a 16-bit type field, and a data field that may be from 46 bytes up to 1500 bytes long, wherein the last 4 bytes constitute a 32-bit cyclic redundancy check (CRC) or frame check sequence. This Ethernet message format establishes the standard required for widespread implementation of LAN technology.
All devices on LANs, such as computers, terminals, test equipment, etc., must naturally possess LAN interface circuitry. A commonly used and important component of such circuitry is the Intel 82586 LAN co-processor. The 82586 performs numerous functions including, among many other things, framing, preamble generation and stripping, source address generation, destination address checking and CRC generation/checking. Microsystem Component Handbook, Volume II, p. 7-288 (Intel, 1984)
An important segment of LAN technology in which the 82586 plays a critical role involves data communications test equipment, commonly known as protocol analyzers. These devices are designed to monitor, as well as generate, traffic on the LAN, such as an Ethernet transmission bus, and then analyze it for the purposes of field service; electronic data processing center support; network component research, development, manufacture, installation and service; and general network trouble shooting.
Such an analyzer may be required to "eavesdrop" on the LAN, examining packet traffic for packets of particular configurations. Used in such a manner, the analyzer reads packets off the LAN, without disrupting their transmission, and sends what it reads through a comparison process. The process involves simultaneously placing the packets in memory and circulating them past so-called trap machines which compare them with target configurations. The comparison process is known as filtering. Limited amounts of memory and other resources require that packets which fail to match the target configurations be discarded while the matching packets are retained in memory.
Obviously, to make valid comparisons, a trap machine must be able to determine the end of a packet so that it can distinguish one packet from another. Current solutions to this problem use the interrupt output pin of the 82586. In the rapid comparison cycles of some trap machines, however, the interrupt signal is inadequate in the case where two packets arrive one immediately after the other, that is, "back-to-back," because the interrupt signal arrives too late. In such a case, data from the second packet is already being stored before the interrupt from the first packet occurs. The solution requires generation of another real-time signal which triggers before the data in the second packet is stored. The circuit to generate this real-time end-of-packet (EOP) signal is the present invention.